PLX™ is PeakView®’s parasitic inductance extraction tool based on PeakView®’s well known 3D Full-wave EM solver, which produces silicon matched models across frequencies. It targets large-scale applications by fitting the inductive element model gap left by conventional parasitic extraction tools providing RC models. Net based parasitic inductance values are well modeled hence backannotated to today’s popular RC extraction flow based on DSPF file. PLX™ was designed to be part of the traditional parasitic extraction flow to deliver a comprehensive RLCK model, critical in today’s regular analog and mixed-signal applications.
PLX™ Flow
- PLX™ seamlessly couples with traditional RC extraction flow (StarRC, QRC or xACT) upon the completion of LVS and conventional PEX.
- PLX™ takes the calibre LVS database (SVDB directory) as well as the RC DSPF file as input, and it generates an RLCK output DSPF file, which can be later used for post-layout sign off simulations.
PLX™ Supported Formats
- PLX Setup
- iRCX format technology file from TSMC
- ITF format technology file from foundries
- PLX Input
- Calibre LVS® clean design through SVDB database
- PEX: Calibre xRC® / Synopsis StarRC™ / Cadence® QRC results in DSPF file format
- PLX Output
- DSPF file format, backannotated by PeakView® and ready for circuit simulation
- Platform
- Linux 64 bit, i.e. Redhat and SUSE
- LSF, NC-based computing farm