PeakView® Electromagnetic Design Platform
- The state-of-the-art technology simplifies the design of complex system-level EM layouts, delivers a complete EM model with 3D accuracy from DC to mmWave-TeraHz frequencies, and provides unique sign-off tools bench-marked for physical verification.
- Device or interconnect models can be represented in both S-parameter and RLCK SPICE sub-circuit models for circuit simulation.
- PeakView®’s products are seamlessly integrated into advanced process nodes from mainstream foundries and facilitate different phases of IC design and verification.
- 3D Fullwave EM simulations are based on direct solver for the most accurate EM results and iterative solver for large-scale simulations.
- PeakView®’s iRCX and ITF parsers support process technology information provided by various foundries.
- PeakView® includes multiple tools addressing EM coupling analysis as key factor during the design verification before tapeout: EM Prototyping™, HFD™, Combo Cell™. EM isolation noise floor up to -130dB.
- PeakView® GUI features a built in visualization window for viewing voltages, currents and 3D mesh.
- The EM platform is fully integrated into the Cadence®, CustomCompiler™ or any design environment that outputs GDSII/ODB++ files.
PeakView® Products
EMD™ – EM Synthesis and Optimization of Passives
PeakView® EMD™ provides parametric EM device synthesis and optimization of sophisticated on-chip passive devices and structures. EMD™ has an extensive synthesis library of parameterized devices that include T-coils, inductors, multi-layer spirals, transformers, mmWave couplers, co-planar waveguides, photonics transmission lines, and other commonly used topologies. (brochure)
LEM – 3D Fullwave EM Extraction and Simulation of Customized Layouts
PeakView® LEM™ represents robust EM simulation of customized layouts loaded easily from layout editors. Large-scale (full-chip) layouts are supported by flexible mesh customization focusing the discretization on critical passives and interconnects, maintaining 3D accuracy with reasonable computing resources.(brochure)
HFD™ – EM Parasitic Analysis Interconnects and Passives
Peakview® HFD extends to 3DIC RLCK and full-wave extraction flow to support RF, mmWave and high-speed analog designs. HFD™ enhances traditional LPE (Layout Parasitic Extraction) by including EM effects into post-layout circuit simulations. EM parasitics are backannotated to original DSPF/ExtractedView guaranteeing proper connectivity based on LVS data. HFD™ is a net-based tool, so so schematic modification is needed. (brochure)
EM Prototyping™ – EM Prototyping Before Layout Completion
Enhance your millimeter wave IC design workflow with PeakView® EM Prototyping™. It analyze circuit-level EM effects like crosstalk and coupling at early stage in the design process, even before finalized layout. PeakView® automates EM device preparation, modeling, and back-annotation, preserving circuit hierarchy for accurate high-frequency performance analysis. Get fast, precise insights to optimize your designs floorplan. (brochure)
3DIC/PKG™ – EM Simulations of 3DIC/Packaging Layouts
3DIC/PKG™ expands the application of PeakView® LEM™ to include advanced processes and packaging signal integrity analysis. This feature provides an efficient solution to address EM design challenges concerning chip-to-chip and chip-to-package interactions by supporting advanced integrations such as 3DIC (Wafer-On-Wafer), COUPE, and CoWoS. (brochure)
PLX™ – Parasitic Inductance Extraction
Our parasitic inductance extraction feature provides Peakview®’s 3D Full-wave EM simulated inductance L as compliment to the original RC parasitics delivered by traditional parasitic extraction tools. PLX™ inductive elements are backannotated to today’s popular DSPF file. (brochure)