Overview
For RF designs, EM simulations are indispensable design/optimize/signal integrity tools. Silicon data are critical reference data to ensure design closure. Silicon data-based modeling tools have their own uncertainty and limits and can be best quantified and enhanced by EM tools.
Typical foundry Silicon Characterization has their limits too. From test key design, test key manufacturing, measurement to de-embedding, almost all manual work, long cycle, and hard to add new devices for different apps/frequencies. Uncertainty exists in the de-embedded results and de-embedding method. Therefore, customer changing requirements of high-quality silicon data are not met. Limited silicon data reference leads to uncertainty in-process data hence the uncertainty in EM design.
Peakview-based Rapid Silicon Characterization approach provides a fast turnaround to support customer requirements, including proven flow and automation. High-quality silicon data with a quantified error margin of inherent methods are used. Reliable correlation with process information and EM simulations guarantees customer satisfactions.
Why PeakView-based silicon characterization?
Lorentz Solution’s Peakview EM platform has been developed to support the automation of Silicon characterization. It has such powerful feature as automatic synthesis of DUT (device under test). Typical de-embedding methods are supported, while new de-embedding methods are extended.
Before Tapeout 
After tapeout course of action:
Silicon Data Correlation
PeakView LEM™ simplifies the process of complex system-level EM design, and comes close to unique sign-off quality that is bench-marked with measurements. Our products are seamlessly integrated into the IC design environment to support the advanced process nodes, thereby greatly facilitating the key steps for EM design. PeakView™ EM modeling solutions at 60 GHz and beyond continue to demonstrate excellent correlation to silicon data. Our EM design flows have been demonstrated in TSMC RF Reference Design Kits and test-keys, simulation and measurement results are matched from 40 GHz to 80 GHz.
Silicon correlation for PA and LNA designs at 60 GHz using PeakView™ Transmission Line Models for TSMC 65nm process is shown below. Then at TSMC 20nm process, PeakView™ simulations of inductors with a variety of metal fill shapes and densities were compared to measurements. The result indicated a close match of silicon measurement for bottom plate capacitance when PeakView CMP was used for metal fill modeling.
Silicon Correlations for PeakView™ Transmission Line Models for (a) PA Module (b) low-noise amplifier (LNA) designs shows closely matched between circuit simulation and silicon measurements at 60GHz
Simulation vs. Measurement in TSMC 20nm Process
For silicon data correlation, 200μm and 400μm long slow-wave transmission lines and GSG Pads are also designed, simulated and fabricated in TSMC 65nm technology and are shown in the following figure. The profile is directly converted from iRCX file from the foundry.
(a) 200μm transmission line with GSG Pads (b) 400μm transmission line with GSG Pads
For 200μm transmission line and frequency up to 67GHz (a) S12, (b) S11. Blue lines are simulation data. (Silicon data courtesy of TSMC)
For 400μm transmission line and frequency up to 67GHz (a) S12, (b) S11. Blue lines are simulation data. (Silicon data courtesy of TSMC)
For more Si data correlation, please contact us at support@lorentzsolution.com.