Electromigration™ and Silicon Photonics


Electromigration is a phenomenon of material transport caused by a gradual movement of ions in a conductor due to momentum transfer between conducting electrons and diffusing metal atoms. It can lead to circuit failure through metal line resistance increase or in the extremes of the current density. It has become a major concern at 28nm and beyond. Peakview Electromigration Checker is a designer-oriented EM-checker.

Two current approaches: manual check and software check

1.   Manual check: time-consuming and unreliable

In order to keep products working successively longer time, designers need to concern the effects of electromigration and deal well with the width, temperature and length of the metal layer. Foundry and CAD engineer will provide adequate information and table for designers to calculate DC current tolerance for each net. Designer need to keep each net maximum DC current larger than the DC current requirement.

2.  Software check. Typically run at late stage of design with sophisticated software.

Complex setup and run, requiring dedicated staff. Check failure will result in redesign and fix, lengthening the design cycle..


  • Simple and easy to use during design stage inside Cadence environment
  • DC-solver accuracy, instant checking and visualization
  • Checked results can be fixed immediately and rechecked

PeakView’s patented EM solver combines high accuracy, computational performance and the capacity needed to analyze complex layouts with devices, interconnect and PCB interfaces.  


Silicon Photonic:

The Silicon Photonic is a CMOS based photonic platform with wide applications in different industries including telecom and datacom.

In silicon photonics, silicon is used as the primary material due to its transparency to infrared light, high refractive index, and compatibility with the existing complementary metal-oxide-semiconductor (CMOS) fabrication process. By using silicon, the technology can be integrated with electronic devices, enabling the creation of hybrid systems that combine both electronics and photonics on the same chip.

Peakview’s methodology for extracting parasitic elements of metal layers, full compatibility with the Cadence environment, PBM tool for extracting equivalent circuits from N-port data (for time-domain simulations), EM co-simulation for packaging, and high-speed component synthesis present a unique opportunity for Silicon Photonic designers to design ultra-high-speed Photonic and optoelectronic components of PIC/EIC. By utilizing these tools, designers can avoid the prolonged process of mmWave design.

Photodiode EM result vs. PBM model

Peakview’s LEM offers designers the ability to extract parasitic components of high-speed photodiodes, including capacitance between metal layers, series inductance, and resistance, by simply importing the GDS file to Peakview and running an EM simulation. The EM simulation generates N-port data which can then be used with the PBM to extract these parameters through a scalable model. This streamlined process provides a practical solution for designers seeking to optimize the performance of high-speed photodiodes in a cost-effective and efficient manner.


Furthermore, in addition to extracting equivalent circuits and parasitic elements, the HFD synthesis tool offers a unique opportunity for silicon photonic engineers to synthesize well-known RF components of PIC, such as coplanar waveguides (CPW), for a specific effective index and frequency range. This capability provides engineers with an efficient means of designing and optimizing the performance of PICs in a highly-customizable and cost-effective manner.


Peakview’s EM co-simulation feature provides a valuable opportunity for silicon photonic chip and package designers to conduct EM co-simulations, allowing them to study the unwanted or mutual effects between Electronic IC (EIC) and Photonic IC (PIC) for 2.5D integration. This approach offers a practical solution for designers seeking to optimize the integration of EIC and PIC in a cost-effective and efficient manner, while reducing the risk of signal interference and other related issues.

Electromigration Risks in Silicon Photonics Design:

Electromigration is a phenomenon that occurs in electronic devices when the flow of electric current causes the atoms in a conductor to migrate. This process can lead to the degradation or failure of the device.

In silicon photonic devices, which are used for manipulating light using silicon-based materials, electromigration can occur when a high current density flows through the metal interconnects used to connect various components in the device. This can cause metal atoms to migrate towards the direction of current flow, which can lead to void formation, metal diffusion, and ultimately, device failure.

Electromigration can be mitigated in silicon photonic devices by optimizing the design of the metal interconnects, such as using wider and thicker metal lines or reducing the current density. Additionally, choosing materials with high resistance to electromigration can also help improve the reliability of these devices.

The Electromigration Checker offered by Peakview operates using the Process Design Kit (PDK) of the foundry and the metal line geometry. This tool allows during Electromigration (EM) simulation, enabling the user to determine if the metal line can pass the Electromigration criteria for a given target temperature and current.







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