PeakView CMP™ provides full support for advanced process node DFM requirements during EM synthesis and Layout EM extraction. Designers are able to define their own metal fill in a PCircuit description and slotting requirements in the GUI. During EM synthesis, these rules are considered so that PeakView™ delivers a DRC clean layout with the industry’s most accurate EM and circuit simulation models.
Foundry planarization schemes, i.e. chemical mechanical polishing, call for DFM (Design for Manufacture) requirements, especially metal slotting and metal fill. It can be difficult to implement DFM rules during manual inductor design. Complex wide metal slotting, staggered slotting/striping, and via handling during manual design are time-consuming, error-prone design processes that is difficult for general purpose EM solvers to accurately model. Design teams, therefore, request design waivers for these structures in order to pass final signoff to manufacturing. For advanced process nodes, fill requirements need to be adhered to for generating accurate EM models. Obtaining a waiver for DFM requirements adversely impacts yield in advanced nodes 20nm and beyond. Hence it becomes necessary to consider metal slotting and fill requirements in EM modeling.
PeakView™ solver precision aids in improved manufacturability by preserving model accuracy. During Layout EM, structures with slotting/striping and metalfill are accurately modeled without significant increase in simulation time. There is no longer a need to simplify the layout for modeling purposes, as PeakView™ fully considers metalfill, slotting/striping and massive via structures from within its platform. Users can define their own metalfill and slotting/stripping requirements with Peakview PCircuits. During EM synthesi, Peakview delivers a DRC clean layout with the industry’s most accurate EM and sub-circuit models. Peakview can also extract layouts from Cadence Virtuoso with no simplification in metalfill, slotting/stripping and via structures. With Peakview CMP, designers can now improve DFM ability without compromised model accuracy.
PeakView CMP™ – Metalfill Support
Metalfills are usually used in CMP to maintain the planarization in the IC manufacturing process. At higher frequency, the dummy metalfills may impact on both inductance and capacitance of the device. PeakView enables users to synthesize dummy metalfills using PCircuit by a few simple clicks, and can also extract customized metalfill patterns from layout without any simplification. PeakView provides comprehensive modeling methods to model dummy metalfills with the passive devices from DC to mmWave and sub-THz range. The modeling results has been validated from foundry’s silicon data.
PeakView™ metalfill study
PeakView CMP™ – Metalfill Synthesis
PeakView allows users to generate complex dummy metalfill patterns through dynamic PCircuit, which provides two types of metalfills: square and RectCross. Meanwhile, the customized metalfill structures can be extracted by PeakView in Cadence Virtuoso environment.
PeakView™ metalfill extraction from Virtuoso
- Metalfill support
- Slotting/Stripping support
- Various Via rules support