Lorentz has developed breakthrough technologies that form a powerful base for EM design and synthesis for on-chip devices and interconnect. These innovative methodologies enable a next generation EM platform for semiconductor design.

PCircuit™ EM Device Synthesis

PCircuit device and interconnect design technology radically simplifies the process of managing the complexity of electromagnetic structures in advanced fabrication processes. Customized PCircuit device descriptions can be coded in a much shorter period of time than Pcells, which usually require 3-6 months. PCircuits is also typically have 100 to 500x fewer lines of code than traditionally scripted device descriptions.

Physics-Based Modeling (PBM)

PeakView™ Physics-Based Modeling (PBM) generates compact RLCK models that guarantee passivity and are physically realizable unlike purely numerical approaches. PBM generated models are compact, accurate and ready for use in Cadence® Spectre, Spectre RF, Synopsys™ HSPICE and other SPICE-based simulators.

Hierarchical Electromagnetics (HEM)

PeakView™ Hierarchical Electromagnetic (HEM) solution is an innovative computational strategy for high-speed EM simulation and much greater capacity than a flat-mode solver. The technology makes possible the analysis of large, complex IC design layouts otherwise not manageable with available resources.

Advance Process Support for Chemical Mechanical Polishing (CMP)

PeakView™ Chemical Mechanical Polishing (CMP) provides full support for advanced process node DFM requirements during EM synthesis and Layout EM extraction. Designers are able to define their own metal fill and slotting requirements in a PCircuit description. During EM synthesis, these rules are considered and PeakView™ delivers a DRC clean layout with accurate EM and circuit simulation models.

Full-wave 3D Electromagnetic Structure Simulator

PeakView™ consistently delivers results closely correlated to silicon measurement ensuring that designs will operate according to specifications. The EM simulation engine typically runs 10 times faster than traditional structure simulators while maintaining excellent accuracy.

Two-Way Lossless Data Exchange With Cadence Virtuoso and Synopsys Custom Compiler

PeakView™ operates directly from within the Cadence® Virtuoso® Analog Design, Laker™ and Synopsys Custom Copmpiler™ environments. The automated two-way, lossless exchange of data between Peakview™ and layout editors eliminates the intermediate manual step of import/export of simulation results, which is an unwieldy aspect of non-integrated EM design interfaces.

Advanced LEM with Cadence Virtuoso

In advanced processes, designers cover their passive devices with BFMOAT/NTN to reduce loss and improve performance. In compact RF, a portion of that BFMOAT/NTN is cut out to allow active circuits under the structures. For EM isolation, BFMOAT/NTN is cut where guard rings are located. Advanced LEM feature in version 4.2.6 and onwards allow designers to perform these studies.


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