Peakview PLX™ is our new parasitic inductance extraction feature based on Peakview’s well known 3D Full-wave EM solver which produces silicon matched models across frequencies, it uses proprietary high capacity volume meshing technology to conquer maxwell equations with speed, capacity, and accuracy tuned at 100x improvements for parasitic inductance extraction with no compromise. Net based parasitic inductance values are well modeled hence annotated to today’s popular RC extraction flow and results such as DSPF file.
The PLX™ Flow Through traditional RC extraction flow, upon the completion of LVS, PEX tools such as StarRC, QRC or xACT can be deployed to extract the interconnect parasitic RCs, and the RC network will be commonly stored in either DSPF file or Extract view. With the new Peakview PLX, the interconnect geometries can be processed by Peakview’s 3D solver to model the perspective parasitic inductance value, while most importantly, these models can be back-annotated to the preserved RC network of the extracted view or DSPF file in the most accurate and compact format, hence producing a complete RLC parasitic network that’s ready for post layout simulation.
The PLX™ Result with Silicon Correlation PLX resulted simulations captures parasitic effects from DC to 60 GHz and beyond, it demonstrated excellent correlation to silicon data in advanced process nodes. It’s targeted for high-frequency, RF and mixed-signal IC designers to be considered as the most reliable and efficient parasitic inductance extraction tool to date. It can also be deployed for the design and verification of broadband gigabits per second (Gbps) on-chip communication systems. Full-scale implementation of PLX will greatly facilitate research and development in the 5G (5th Generation wireless network) standards and associated hardware, where millimeter wave frequency bands are of primary interest.