PeakView EM Designer, EMD™


PeakView EM Designer, EMD™ has an extensive synthesis library of parameterized devices aiding designers as they explore, design and adjust advanced components in preparation for circuit simulation and optimization. In addition to the offered devices, users also have the flexibility to script and customized an existing PCircuits – parameterized EM devices – to meet their specific design needs.

EMD™ offers complete automation of the EM device synthesis flow through seamless integration of PeakView™ models into your existing design library. Besides supporting S-Parameter Models, EMD™ also supports PBM™ (Physics-based Model) feature that generates compact RLCK models preserving DC inductance and resistance. The high quality EM data generated by EMD are closely correlates to silicon measurements from major foundries and IC design companies.



  • Full-wave EM Device Synthesis with a Standard and Extensible Library

PeakView EMD™ provides full-wave EM device synthesis for advanced on-chip passive structures.  The standard PCircuit library consists of a broad selection of parameterized devices, and is further extensible with Python code for user-defined devices.

  • Accuracy, Performance and Capacity

PeakView’s patented EM solver combines high accuracy, computational performance and the capacity needed to analyze complex layouts with devices, interconnect and PCB/Packaging interfaces.

  • Physics-Based Modeling

A key benefit of working with EMD™ is the choice of using compact RLCK models for EM devices called Physics-Based models (PBM™). These circuit equivalent models are guaranteed to be passive and preserve DC inductance and resistance.

  •  Circuit and EM Co-Simulation

EMD™ provides a powerful feature for running circuit and EM co-simulation driven from Virtuoso® Analog Design Environment (ADE). Users are able to sweep parameters of synthesized devices within ADE.  PeakView™ computes the EM results and updates the simulation net-list for each iteration of the sweep.

  •  Powerful Python Based PCircuits

PeakView PCircuit™ is Python based parameterized cell. Compared to cumbersome PCells by the competitor, it provide easy access to a rich library of parameterized physical structures in Python device topology templates, the high-level interpretive language offers superior advantages over the inefficient interpretive languages based pcells offered by our competitor. It also seamlessly integrated with popular layout editor through rapid gds import/export.

  •  Process Independent

Like other PeakView tools, EMD and PCircuits are process independent. The  required layer stacking profile can be easily converted from industry standard layer information files such as iRCX, ITF or ICT, hence its effortless to switch foundries or process nodes.


EMD™ Flow

With PeakView EMDTM, users have the choice to either: 1. instantiate a component from the standard PCircuit Library using a pull-down menu from the GUI, or, 2. import a customized PCircuit with user-defined geometry and design parameters that is scripted with Python.

EMD™ offers passive device EM synthesis and optimization to ensure optimized device and performance. The “Sweep and Synthesis” feature which helps designers not only optimize performance but also as a way to study the physical sensitivity of parameters. During sweeping, PeakView™ generates a family of child cells corresponding to each point in the range for record keeping.

The following figures show a specific PCircuit is selected and set baseline EMD synthesis target for 230pH at 10 GHz, once baseline condition is selected and locked in, user can then to optimize the quality factor Q via parameter sweeping, the parameter chosen here is the device’s winding width, and sweeping value from 10μm to 40μm with 7 data points:

Design optimization using PeakView™ sweep function

Another major feature of EMD™ is upon synthesis, it offers the capability to create the necessary cell views (i.e. schematic symbols, DRC clean layouts, S-parameter and Physics-Based models) to be synced to the existing design libraries.


EMD™ Flow

EMD™ Features

Advanced EM Modeling Features

1.   PCircuit EM Device Synthesis

Users can choose from the standard PCircuit library consisting of a wide-ranging collection of sophisticated parameterized devices that includes inductors, baluns, transformers, transmission lines, capacitors and many other popular topologies:

EMD_new5 better

  • Built-in devices: PCircuits come with the software and ready to be used upon installation, it covers 90% of the passive device needs from designers
  • Special or advanced devices: These are some of the more complex and specialized devices that’s available upon request, it goes above and beyond of typical devices, such as transformers, T-coil, balun, pyramid inductors.
  • Dynamic PCircuits: These are the add-on circuits for the core passive devices, such as guard rings, patterned-ground shields, etc. The key advantage is these dynamically adjustable PCircuits is that these can be added to the device of interest and simulated to manifest their effects on core devices, such as L and Q values.

PCircuit PGS_Adv(Left) vs PGS_Regular (Right)

DPCircuits Benefits: PGS plays an important role for on-chip passive device design.

  • PGS enhances Q by blocking the substrate displacement current loss.
  • PGS provides better EM isolation for EM devices.
  • PGS must avoid current loop and use lower metal layers to minimize extra capacitance.
  • PGS supports stringent DRC (0˚, 90˚ are not permitted between the same metal layer, 45˚, 135˚ are never permitted, 90˚ is allowed between two different metal layers) for advanved node.

Peakview simulation shows that with advanced node PGS, Q value of an octagon inductor increases considerably.


Quality Factor improvement using PGS_Adv

Inductors with advance node PGS provides 20dB better common-mode EM isolation. Inductors with advance node PGS operating in differential-mode maintain -55dB EM isolation at 1 GHz.

2.   DFM Support for Advanced Processes

EMD™ addresses challenges in advanced processes by using the PeakView™ chemical-mechanical polishing (CMP) option. This feature allows EMD™ to accurately simulate and extract complex metal slotting, via arrays. It enable users to model dummy metal fill with their passive devices at all frequency ranges. PeakView EMD™, in conjunction with CMP™, provides full support for advanced process node DFM requirements during EM synthesis and Layout EM extraction.

3.  Physics-Based Modeling

In addition to purely numerical n-port S-parameter models, PeakView EMD™ provides the option to generate compact RLCK models known as the Physics-Based Modeling (PBM) solution, which generate SPICE compatible equivalent sub-circuits for use in transient circuit simulations. PBM models are guaranteed to be convergent and passive over a user selectable frequency range. PBM preserves the DC inductance and resistance and does not shift the circuit’s operating point.

4.  Foundry Adopted and Qualified

EMD_new6Foundry test chip designed with PeakView PCircuits

Lorentz Solution’s foundry user-base regularly utilizes the PeakView™ EM Design platform to design components for their reference flows in RF/AMS processes. PeakView™ is TSMC MS/RF RDK 2.0/3.0 qualified for the R reference flow development. An example of a partial die with Peakview modeled inductors (DUTs) and test-keys for a TSMC 20nm process is shown in the figure.  For each DUT, PeakView™ assigns different metal fill layers, densities and shapes. The test key structures are designed as open, short and through, useful for the post measurement de-embedding process. Lorentz Solution, with its deep expertise in building EDA tools for high-speed design and EM simulation, has been a long time partner with foundries.

Tool Integration

1.   Circuit and EM Co-Simulation

EMD™ has a Circuit and EM Co-Simulation feature that can be driven from Virtuoso’s Analog Design Environment (ADE). With the Co-simulation feature, EM simulation is driven by Circuit simulation in ADE and the corresponding device model is generated on the fly. Designers only need to consider the circuit level behavior, and EMD™ generates new device EM models and inserts the models into the net-list automatically. In this manner, users remain in the ADE environment, while PeakView™ handles the EM simulations in the background providing enhanced designer productivity.

High-Performance Features

1.   Customized Accuracy Setting through Flexible Meshing

In addition to pre-configured EM simulation types, PeakView™ has implemented Customized Accuracy Schemes such as Flexible Meshing and Various Accuracy Type Features to enhance the flexibility of accuracy settings and to configure layout processing and EM simulation options. Such capability enable users to easily tune the tool allowing EM simulation to be optimized for various needs, where concurrent simulation for structures of varying scales is required.

      2. Multi-core Processing and Distributed Computing

In order to maximize the utilization of computing resources, EMD™ takes advantage of PeakView’s multi-core processing capability. Design jobs can be run on compute farms consisting of multi-core machines, as well as on standalone platforms with multi-processor hardware. PeakView™ provides different distributed computing modes to concurrently accelerate the EM modeling. Users are able to specify different frequency points to be simulated on different machines in a compute farm for maximum efficiency of resources.

Silicon Data Correlation

EMD™ simulations confirm excellent correlation to silicon data in advanced process nodes. It has been successfully deployed in characterizing a 20nm process node and verified within a 1-2% margin of error for inductance. A plot of silicon measurement vs. simulation for a single-ended total capacitance of a 1-turn inductor is shown in the following figure.

Total capacitance vs. frequency plot for a 20nm single-turn inductor (courtesy of TSMC)

Supported Formats

  • EMD Setup
    1. iRCX format technology file from  TSMC
    2. ITF format technology file from foundries
  • EMD Input
    1. Standard Library PCircuit
    2. User-defined PCircuit
  • EMD Output
    1. n-port, Physics-Based EM models.
    2. Cadence® library views, i.e. DRC clean layout, schematic symbols, etc.
  • Platform
    1. Linux 64 bit, i.e. Redhat and SUSE
    2. LSF, NC-based computing farm

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