PeakView Electromigration™

Overview

Electromigration can lead to circuit failure through metal line resistance increase or in the extreme the line opens. It has become a major concern at 28nm and below. Peakview Electromigration Checker is a designer-oriented EM-checker

Two current approaches: manual check and software check

1.   Manual check: time-consuming and unreliable

In order to keep products working successively longer time, designers need to concern the effects of electromigration and deal well with the width, temperature and length of the metal layer. Foundry and CAD engineer will provide adequate information and table for designers to calculate DC current tolerance for each net. Designer need to keep each net maximum DC current larger than the DC current requirement.

2.  Software check. Typically run at late stage of design with sophisticated software.

Complex setup and run, requiring dedicated staff. Check failure will result in redesign and fix, lengthening the design cycle..

Benefits

  • Simple and easy to use during design stage inside Cadence environment

Peakview Electromigration Checker provides iRCX parser to generate EMCheck profile.

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PeakView Electromigration™ setup

  • DC-solver accuracy, instant checking and visualization

LEMTM is seamlessly integrated into the Virtuoso® and Laker™ layout editors with a bi-directional, lossless data exchange interface. Designers are able utilize the tool in their familiar IC design environment.

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Visualization of check results in Field View

  • Checked results can be fixed immediately and rechecked

PeakView’s patented EM solver combines high accuracy, computational performance and the capacity needed to analyze complex layouts with devices, interconnect and PCB interfaces.  

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Run Electromigration Check and Report

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