PeakView LEM
Layout EM Extraction
PeakView’s Layout EM (LEM) extraction engine provides “1-click” 3D EM Simulation from inside the Cadence Virtuoso™ environment. PeakView LEM ease of use makes it a very useful tool for the designer. With only “1-click”, any Cadence layout view containing only passive structures and interconnect is automatically extracted and a full 3D EM simulation completed in matter of a few minutes! The designer never has to leave the Cadence IC layout environment. PeakView LEM has a very high-capacity and has ability to swallow even complex multi-port structures containing several devices and interconnect and return an accurate multi-port EM model within a matter of minutes.

PeakView LEM has several uses including extending custom inductor layout and modeling. Precisely architected devices can be iteratively “tweaked” during layout to optimize certain performance objectives. Here, PeakView LEM is an indispensable tool closing the loop between layout and circuit simulation model. Designers often choose to add LEM to PeakView’s EM synthesis capability. Combining these two capabilities enables designers to synthesize new inductors ”on-the-fly” and later optimize the design by “tuning” the layout to improve performance or to reduce area. 

PeakView LEM capabilities are also leveraged during EM Integrity analysis to support legacy designs containing non-PeakView synthesized devices. Here, each legacy devices’ S-parameter and circuit model are preserved but PeakView’s EM Integrity analysis computes coupling factors for each device and prepares the netlist for SpectreRF simulation.
 

PeakView LEM Key Features

• 1-Click Layout EM Extraction
• Runs Directly on Cadence Layout
• High-Capacity, Fast, Accurate EM Simulation
• Custom Inductor Layout Support
• Incremental Modeling During Layout Optimization
• Legacy Design and Device Support
  
  
   

PeakView’s “1-Click” Layout EM Extraction works directly inside Cadence’s Virtuoso’s layout environment. LEM can be applied to individual custom devices or used to check the EM integrity of larger pieces of layout containing several devices and nearby interconnect. LEM has proven very useful for EM coupling debug and analysis.