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Lorentz Solution, Inc. is an electronic design automation (EDA) company founded in 2002 to focus on high-frequency (HF) integrated circuit design closure and sign-off. Semiconductor companies designing and building products for cost-sensitive applications, such as, UWB, WLAN, 3G, and 10G Phy use Lorentz products to improve overall system performance while reducing chip development costs and enhancing design efficiency.

1900_McCarthy_251

Company Headquarters
1900 McCarthy Blvd., Suite 208
Milpitas, CA. 95035
408-922-0765

HF IC designs pose special problems that require new approaches to guarantee on-chip performance degrading electromagnetic (EM) effects are minimized. HF circuits have traditionally been extremely difficult to simulate and model pushing design teams to follow the route of extensive test chip development and characterization to obtain models for use by circuit designers. This is approach in no longer cost-effective and takes too long. Design teams must now enhance their current EM design practices by adding EM Design and Verification tools to their design flows to account for these on-chip EM effects. Ignoring these EM integrity effects adds significant risk of missing market windows by not meet tightly regulated industry standards forcing expensive design iterations. Lorentz’s PeakView product line provides the missing link for designers to effectively address and achieve HF design closure and sign-off with confidence.

In October 2004, Lorentz secured equity funding from WK Technology Fund and Telos Venture Partners (Palo Alto, CA). The company is headquartered in Milpitas, CA and is currently expanding its development, customer support, and marketing/sales organizations.

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Copyright Lorentz Solution, Inc. 2007